On Tue, Mar 03, 2026 at 02:17:32PM +0800, lizhi2@eswincomputing.com wrote:
quoted hunk ↗ jump to hunk
From: Zhi Li <redacted>
Enable the on-board Gigabit Ethernet controller on the
HiFive Premier P550 development board.
Signed-off-by: Zhi Li <redacted>
---
.../dts/eswin/eic7700-hifive-premier-p550.dts | 50 +++++++++++++++++
arch/riscv/boot/dts/eswin/eic7700.dtsi | 54 +++++++++++++++++++
2 files changed, 104 insertions(+)
diff --git a/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts b/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts
index 131ed1fc6b2e..d558f0fdfb38 100644
--- a/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts
+++ b/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts
...
quoted hunk ↗ jump to hunk
@@ -20,6 +22,54 @@ chosen {
};
};
+&gmac0 {
+ phy-handle = <&gmac0_phy0>;
+ phy-mode = "rgmii-id";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio106_pins>;
+ rx-internal-delay-ps = <20>;
+ tx-internal-delay-ps = <100>;
+ status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
Since it's implemented in the DWMAC IP, I think the mdio bus is
SoC-specific and should be put into the SoC devicetree instead.
Regards,
Yao Zi
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gmac0_phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-id001c.c916";
+ reg = <0>;
+ reset-gpios = <&gpioD 10 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <10000>;
+ reset-deassert-us = <80000>;
+ };
+ };
+};