Re: [PATCH v18 17/20] cxl: Avoid dax creation for accelerators
From: Dave Jiang <dave.jiang@intel.com>
Date: 2025-09-19 21:16:46
Also in:
linux-cxl
On 9/18/25 2:17 AM, alejandro.lucero-palau@amd.com wrote:
From: Alejandro Lucero <redacted> By definition a type2 cxl device will use the host managed memory for specific functionality, therefore it should not be available to other uses. Signed-off-by: Alejandro Lucero <redacted> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Davidlohr Bueso <redacted>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
quoted hunk ↗ jump to hunk
--- drivers/cxl/core/region.c | 7 +++++++ 1 file changed, 7 insertions(+)diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 20bd0c82806c..e39f272dd445 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c@@ -3922,6 +3922,13 @@ static int cxl_region_probe(struct device *dev) if (rc) return rc; + /* + * HDM-D[B] (device-memory) regions have accelerator specific usage. + * Skip device-dax registration. + */ + if (cxlr->type == CXL_DECODER_DEVMEM) + return 0; + switch (cxlr->mode) { case CXL_PARTMODE_PMEM: rc = devm_cxl_region_edac_register(cxlr);