On Thu, Jul 31, 2025 at 08:26:43PM +0100, Russell King (Oracle) wrote:

and this works. So... we could actually reconfigure the PHY independent
of what was programmed into the firmware.

It does work indeed, the trouble will be adding this code to the common
mainline kernel driver and then watching various boards break after their
known-good firmware provisioning was overwritten, from a source of unknown
applicability to their system.

Also, there are some registers which cannot be modified over MDIO, like
those involved in reconfiguring the AQR412C from 4x single-port USXGMII
lanes to 1x quad-port 10G-QXGMII lane (or "MUSX", as Aquantia call this).
I am actually investigating this currently - trying to find a way for
Linux to distinguish "MUSX" from USXGMII, in order to upstream a first
user of PHY_INTERFACE_MODE_10G_QXGMII.