Re: [PATCH v2 2/4] riscv: dts: allwinner: d1: Add CAN controller nodes
From: Jernej Škrabec <jernej.skrabec@gmail.com>
Date: 2023-07-30 22:04:08
Also in:
linux-arm-kernel, linux-can, linux-devicetree, linux-riscv, linux-sunxi, lkml
Dne nedelja, 23. julij 2023 ob 11:18:33 CEST je John Watts napisal(a):
On Sat, Jul 22, 2023 at 08:15:51AM +1000, John Watts wrote:quoted
... + /omit-if-no-ref/ + can0_pins: can0-pins { + pins = "PB2", "PB3"; + function = "can0"; + }; ... + can0: can@2504000 { + compatible = "allwinner,sun20i-d1-can"; + reg = <0x02504000 0x400>; + interrupts = <SOC_PERIPHERAL_IRQ(21)
IRQ_TYPE_LEVEL_HIGH>;
quoted
+ clocks = <&ccu CLK_BUS_CAN0>; + resets = <&ccu RST_BUS_CAN0>; + status = "disabled"; + };Just a quick late night question to people with more knowledge than me: These chips only have one pinctrl configuration for can0 and can1. Should the can nodes have this pre-set instead of the board dts doing this?
Yes, that's usually how it's done.
I see this happening in sun4i-a10.dtsi for instance, but it also seems like it could become a problem when it comes to re-using the dtsi for newer chip variants.
Properties can be either rewritten or deleted further down, so don't worry about that. Best regards, Jernej
John.