RE: [RFC PATCH v8 08/10] ice: implement dpll interface to control cgu
From: "Kubalewski, Arkadiusz" <arkadiusz.kubalewski@intel.com>
Date: 2023-07-03 12:37:31
Also in:
intel-wired-lan, linux-clk, linux-doc, linux-rdma, lkml
From: Jiri Pirko <jiri@resnulli.us> Sent: Thursday, June 29, 2023 8:14 AM Wed, Jun 21, 2023 at 02:29:59PM CEST, jiri@resnulli.us wrote:quoted
Mon, Jun 19, 2023 at 10:34:12PM CEST, arkadiusz.kubalewski@intel.comwrote:quoted
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From: Jiri Pirko <jiri@resnulli.us> Sent: Saturday, June 10, 2023 6:37 PM Fri, Jun 09, 2023 at 02:18:51PM CEST, arkadiusz.kubalewski@intel.com wrote: [...]quoted
+static int ice_dpll_mode_get(const struct dpll_device *dpll, void *priv, + enum dpll_mode *mode, + struct netlink_ext_ack *extack) +{ + *mode = DPLL_MODE_AUTOMATIC;I don't understand how the automatic mode could work with SyncE. The There is one pin exposed for one netdev. The SyncE daemon should select exacly one pin. How do you achieve that? Is is by setting DPLL_PIN_STATE_SELECTABLE on the pin-netdev you want to select and DPLL_PIN_STATE_DISCONNECTED on the rest? [...]AUTOMATIC mode autoselects highest priority valid signal. As you have pointed out, for SyncE selection, the user must be able to manually select a pin state to enable recovery of signal from particular port. In "ice" case there are 2 pins for network PHY clock signal recovery, and both are parent pins (MUX-type). There are also 4 pins assigned to netdevs (one per port). Thus passing a signal from PHY to the pin is done through the MUX- pin, by selecting proper state on pin-parent pair (where parent pins is highest prio pin on dpll).Could you show me some examples please?Arkadiusz, could you please reply to this? Thanks!
Sure, sorry for the delays, let's try that. 'ice' use case: Enabling a PHY clock recovery for DPLL_MODE_AUTOMATIC dpll (ID#0) with PHY recovered clock signals (PIN_ID#13) being muxed using MUX-type pin (PIN_ID#2) 1. Set MUX-type pin to state selectable and highest priority on a dpll device (or make sure it is already configured): CMD_PIN_SET: PIN_ID 2 PIN_PARENT_DEVICE (nest) ID 0 PIN_STATE SELECTABLE PIN_PRIO 0 (assume all the other pins have prio >=1) 2. Set connected state on a pin-parent_pin tuple where parent is a pin from #1 CMD_PIN_SET: PIN_ID 13 PIN_PARENT_PIN (nest) PIN_ID 2 PIN_STATE CONNECTED Thank you! Arkadiusz
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Thank you! Arkadiusz