On Fri, 2022-07-01 at 09:07 +0100, Russell King (Oracle) wrote:

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On Fri, Jul 01, 2022 at 05:51:33AM +0000, Arun.Ramadoss@microchip.com
 wrote:

quoted

quoted

quoted

+void lan937x_phylink_get_caps(struct ksz_device *dev, int
port,
+                           struct phylink_config *config)
+{
+     config->mac_capabilities = MAC_100FD;
+
+     if (dev->info->supports_rgmii[port]) {
+             /* MII/RMII/RGMII ports */
+             config->mac_capabilities |= MAC_ASYM_PAUSE |
MAC_SYM_PAUSE |
+                                         MAC_100HD | MAC_10 |
MAC_1000FD;

And SGMII too? (Which seems to be a given because from your list
in
the
series cover message, SGMII ports also support RGMII).

No, SGMII port does not support the RGMII. I have mentioned in the
cover message that LAN9373 has 2 RGMII and 1 SGMII port. No other
part
number has SGMII port.

So when using SGMII, there's no way for pause frames to be supported?
It seems a bit weird that the pause frame capability is dependent on
the interface type, as pause frames are just the same as normal
ethernet frames, except they're ggenerally enerated and/or
interpreted
by the MAC.

As per the comment, I infer that you want to include the capability of
SGMII port as well. As of now, we implemented the dsa for RMII/RGMII.
Yet to implement and test the SGMII port. Since we have not tested the
port, we haven't included it. As per datasheet, SGMII port supports the
flow control.

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