Hi Russell,
Thanks for the review comment.

On Thu, 2022-06-30 at 12:42 +0100, Russell King (Oracle) wrote:

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On Thu, Jun 30, 2022 at 03:50:39PM +0530, Arun Ramadoss wrote:

quoted

+static void lan937x_config_gbit(struct ksz_device *dev, bool gbit,
u8 *data)
+{
+     if (gbit)
+             *data &= ~PORT_MII_NOT_1GBIT;
+     else
+             *data |= PORT_MII_NOT_1GBIT;
+}
+
+static void lan937x_config_interface(struct ksz_device *dev, int
port,
+                                  int speed, int duplex,
+                                  bool tx_pause, bool rx_pause)
+{
+     u8 xmii_ctrl0, xmii_ctrl1;
+
+     ksz_pread8(dev, port, REG_PORT_XMII_CTRL_0, &xmii_ctrl0);
+     ksz_pread8(dev, port, REG_PORT_XMII_CTRL_1, &xmii_ctrl1);
+
+     switch (speed) {
+     case SPEED_1000:
+             lan937x_config_gbit(dev, true, &xmii_ctrl1);
+             break;
+     case SPEED_100:
+             lan937x_config_gbit(dev, false, &xmii_ctrl1);
+             xmii_ctrl0 |= PORT_MII_100MBIT;
+             break;
+     case SPEED_10:
+             lan937x_config_gbit(dev, false, &xmii_ctrl1);
+             xmii_ctrl0 &= ~PORT_MII_100MBIT;
+             break;
+     default:
+             dev_err(dev->dev, "Unsupported speed on port %d:
%d\n",
+                     port, speed);
+             return;
+     }

Isn't this:

        if (speed == SPEED_1000)
                xmii_ctrl1 &= ~PORT_MII_NOT_1GBIT;
        else
                xmii_ctrl1 |= PORT_MII_NOT_1GBIT;

        if (speed == SPEED_100)
                xmii_ctrl0 |= PORT_MII_100MBIT;
        else
                xmii_ctrl0 &= ~PORT_MII_100MBIT;

There isn't much need to validate that "speed" is correct, you've
already told phylink that you only support 1G, 100M and 10M so you're
not going to get called with anything except one of those.

Ok, I will update the code.

quoted

+
+     if (duplex)
+             xmii_ctrl0 |= PORT_MII_FULL_DUPLEX;
+     else
+             xmii_ctrl0 &= ~PORT_MII_FULL_DUPLEX;
+
+     if (tx_pause)
+             xmii_ctrl0 |= PORT_MII_TX_FLOW_CTRL;
+     else
+             xmii_ctrl1 &= ~PORT_MII_TX_FLOW_CTRL;

It seems weird to set a bit in one register and clear it in a
different
register. I suspect you mean xmii_ctrl0 here.

Sorry, its a typo mistake. I will update the register.

quoted

+
+     if (rx_pause)
+             xmii_ctrl0 |= PORT_MII_RX_FLOW_CTRL;
+     else
+             xmii_ctrl0 &= ~PORT_MII_RX_FLOW_CTRL;
+
+     ksz_pwrite8(dev, port, REG_PORT_XMII_CTRL_0, xmii_ctrl0);
+     ksz_pwrite8(dev, port, REG_PORT_XMII_CTRL_1, xmii_ctrl1);
+}
+

Thanks!

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