Re: [PATCH] HPE BMC GXP SUPPORT

Hi,

On Wed, Feb 02, 2022 at 10:52:50AM -0600, nick.hawkins@hpe.com wrote:

It's normal to list all linux/ includes before asm/ includes. Please
rearrange.

+
+#define IOP_REGS_PHYS_BASE 0xc0000000
+#define IOP_REGS_VIRT_BASE 0xf0000000
+#define IOP_REGS_SIZE (240*SZ_1M)
+
+#define IOP_EHCI_USBCMD 0x0efe0010
+
+static struct map_desc gxp_io_desc[] __initdata = {
+	{
+	.virtual	= (unsigned long)IOP_REGS_VIRT_BASE,
+	.pfn		= __phys_to_pfn(IOP_REGS_PHYS_BASE),
+	.length		= IOP_REGS_SIZE,
+	.type		= MT_DEVICE,

If you keep this, please indent the above four lines by one more tab.

+	},
+};
+
+void __init gxp_map_io(void)
+{
+	iotable_init(gxp_io_desc, ARRAY_SIZE(gxp_io_desc));
+}
+
+static void __init gxp_dt_init(void)
+{
+	/*reset EHCI host controller for clear start*/
+	__raw_writel(0x00080002,
+		(void __iomem *)(IOP_REGS_VIRT_BASE + IOP_EHCI_USBCMD));

Please consider making IOP_REGS_VIRT_BASE a 'void __iomem' pointer, it
being a _virtual_ iomem address. This should save you needing repeated
casts except for the initialiser above.

Why do you need asm/irq.h ?

+
+#define TIMER0_FREQ 1000000
+#define TIMER1_FREQ 1000000
+
+#define MASK_TCS_ENABLE		0x01
+#define MASK_TCS_PERIOD		0x02
+#define MASK_TCS_RELOAD		0x04
+#define MASK_TCS_TC		0x80
+
+struct gxp_timer {
+	void __iomem *counter;
+	void __iomem *control;
+	struct clock_event_device evt;
+};
+
+static void __iomem *system_clock __read_mostly;
+
+static u64 notrace gxp_sched_read(void)
+{
+	return readl_relaxed(system_clock);
+}
+
+static int gxp_time_set_next_event(unsigned long event,
+					struct clock_event_device *evt_dev)
+{
+	struct gxp_timer *timer = container_of(evt_dev, struct gxp_timer, evt);
+	/*clear TC by write 1 and disable timer int and counting*/
+	writeb_relaxed(MASK_TCS_TC, timer->control);
+	/*update counter value*/
+	writel_relaxed(event, timer->counter);
+	/*enable timer counting and int*/
+	writeb_relaxed(MASK_TCS_TC|MASK_TCS_ENABLE, timer->control);

Spaces around the | please. checkpatch probably should've noticed that.

+
+	return 0;
+}
+
+static irqreturn_t gxp_time_interrupt(int irq, void *dev_id)
+{
+	struct gxp_timer *timer = dev_id;
+	void (*event_handler)(struct clock_event_device *timer);
+
+

One too many blank lines.

+	if (readb_relaxed(timer->control) & MASK_TCS_TC) {
+		writeb_relaxed(MASK_TCS_TC, timer->control);
+
+		event_handler = READ_ONCE(timer->evt.event_handler);
+		if (event_handler)
+			event_handler(&timer->evt);
+		return IRQ_HANDLED;
+	} else {
+		return IRQ_NONE;
+	}
+}
+
+static int __init gxp_timer_init(struct device_node *node)
+{
+	void __iomem *base_counter;
+	void __iomem *base_control;
+	u32 freq;
+	int ret, irq;
+	struct gxp_timer *gxp_timer;
+
+	base_counter = of_iomap(node, 0);
+	if (!base_counter) {
+		pr_err("Can't remap counter registers");
+		return -ENXIO;
+	}
+
+	base_control = of_iomap(node, 1);
+	if (!base_control) {
+		pr_err("Can't remap control registers");

iounmap base_counter?

+		return -ENXIO;
+	}
+
+	system_clock = of_iomap(node, 2);
+	if (!system_clock) {
+		pr_err("Can't remap control registers");

iounmap base_counter and base_control?

+		return -ENXIO;
+	}
+
+	if (of_property_read_u32(node, "clock-frequency", &freq)) {
+		pr_err("Can't read clock-frequency\n");
+		goto err_iounmap;
+	}
+
+	sched_clock_register(gxp_sched_read, 32, freq);
+	clocksource_mmio_init(system_clock, node->name, freq,
+				300, 32, clocksource_mmio_readl_up);

We normally align continutation lines in function arguments to the
opening ( thusly:

	clocksource_mmio_init(system_clock, node->name, freq,
			      300, 32, clocksource_mmio_readl_up);

+
+	irq = irq_of_parse_and_map(node, 0);
+	if (irq <= 0) {
+		ret = -EINVAL;
+		pr_err("GXP Timer Can't parse IRQ %d", irq);
+		goto err_iounmap;
+	}
+
+	gxp_timer = kzalloc(sizeof(*gxp_timer), GFP_KERNEL);
+	if (!gxp_timer) {
+		ret = -ENOMEM;
+		goto err_iounmap;
+	}
+
+	gxp_timer->counter = base_counter;
+	gxp_timer->control = base_control;
+	gxp_timer->evt.name = node->name;
+	gxp_timer->evt.rating = 300;
+	gxp_timer->evt.features = CLOCK_EVT_FEAT_ONESHOT;
+	gxp_timer->evt.set_next_event = gxp_time_set_next_event;
+	gxp_timer->evt.cpumask = cpumask_of(0);
+
+	if (request_irq(irq, gxp_time_interrupt, IRQF_TIMER | IRQF_SHARED,
+		node->name, gxp_timer)) {

Again:

	if (request_irq(irq, gxp_time_interrupt, IRQF_TIMER | IRQF_SHARED,
			node->name, gxp_timer)) {

+		pr_err("%s: request_irq() failed\n", "GXP Timer Tick");

Consider storing the error code from request_irq() and printing it here.
So:

	err = request_irq(...);
	if (err) {
		pr_err("%s: request_irq() failed: %pe\n", "GXP Timer Tick",
		       ERR_PTR(err));

+		goto err_timer_free;
+	}
+
+	clockevents_config_and_register(&gxp_timer->evt, TIMER0_FREQ,
+					0xf, 0xffffffff);
+
+	pr_info("gxp: system timer (irq = %d)\n", irq);
+	return 0;
+
+
+err_timer_free:
+	kfree(gxp_timer);
+
+err_iounmap:
+	iounmap(system_clock);
+	iounmap(base_control);
+	iounmap(base_counter);
+	return ret;
+}
+
+TIMER_OF_DECLARE(gxp, "hpe,gxp-timer", gxp_timer_init);

Thanks.

-- 
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