Re: mv88e6240 configuration broken for B850v3

On Mon, Dec 06, 2021 at 07:24:56PM +0000, Martyn Welch wrote:

On Mon, 2021-12-06 at 20:50 +0200, Vladimir Oltean wrote:

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On Mon, Dec 06, 2021 at 06:37:44PM +0000, Martyn Welch wrote:

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On Mon, 2021-12-06 at 20:31 +0200, Vladimir Oltean wrote:

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On Mon, Dec 06, 2021 at 06:26:25PM +0000, Martyn Welch wrote:

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On Mon, 2021-12-06 at 17:44 +0000, Martyn Welch wrote:

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On Fri, 2021-12-03 at 17:25 +0100, Andrew Lunn wrote:

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Hi Andrew,

Adding Russell to Cc:

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I'm currently in the process of updating the GE B850v3
[1] to
run
a
newer kernel than the one it's currently running. 

Which kernel exactly. We like bug reports against net-next,
or
at
least the last -rc.

I tested using v5.15-rc3 and that was also affected.

I've just tested v5.16-rc4 (sorry - just realised I previously
wrote
v5.15-rc3, it was v5.16-rc3...) and that was exactly the same.

Just to clarify: you're saying that you're on v5.16-rc4 and that
if
you
revert commit 3be98b2d5fbc ("net: dsa: Down cpu/dsa ports phylink
will
control"), the link works again?

Correct

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It is a bit strange that the external ports negotiate at
10Mbps/Full,
is that the link speed you intend the ports to work at?

Yes, that's 100% intentional due to what's connected to to those
ports
and the environment it works in.

Martyn

Just out of curiosity, can you try this change? It looks like a
simple
case of mismatched conditions inside the mv88e6xxx driver between
what
is supposed to force the link down and what is supposed to force it
up:

diff --git a/net/dsa/port.c b/net/dsa/port.c
index 20f183213cbc..d235270babf7 100644
--- a/net/dsa/port.c
+++ b/net/dsa/port.c

@@ -1221,7 +1221,7 @@ int dsa_port_link_register_of(struct dsa_port

*dp)
                if (of_phy_is_fixed_link(dp->dn) || phy_np) {
                        if (ds->ops->phylink_mac_link_down)
                                ds->ops->phylink_mac_link_down(ds, port,
-                                       MLO_AN_FIXED, PHY_INTERFACE_MODE_NA);
+                                       MLO_AN_PHY, PHY_INTERFACE_MODE_NA);
                        return dsa_port_phylink_register(dp);
                }
                return 0;

Yes, that appears to also make it work.

Martyn

Well, I just pointed out what the problem is, I don't know how to solve
it, honest! :)

It's clear that the code is wrong, because it's in an "if" block that
checks for "of_phy_is_fixed_link(dp->dn) || phy_np" but then it omits
the "phy_np" part of it. On the other hand we can't just go ahead and
say "if (phy_np) mode = MLO_AN_PHY; else mode = MLO_AN_FIXED;" because
MLO_AN_INBAND is also a valid option that we may be omitting. So we'd
have to duplicate part of the logic from phylink_parse_mode(), which
does not appear ideal at all. What would be ideal is if this fabricated
phylink call would not be done at all, but I don't know enough about the
systems that need it, I expect Andrew knows more.