Thread (34 messages) 34 messages, 4 authors, 2021-12-07

Re: mv88e6240 configuration broken for B850v3

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From: Martyn Welch <hidden>
Date: 2021-12-06 19:25:03

On Mon, 2021-12-06 at 20:50 +0200, Vladimir Oltean wrote:
quoted hunk ↗ jump to hunk
On Mon, Dec 06, 2021 at 06:37:44PM +0000, Martyn Welch wrote:
quoted
On Mon, 2021-12-06 at 20:31 +0200, Vladimir Oltean wrote:
quoted
On Mon, Dec 06, 2021 at 06:26:25PM +0000, Martyn Welch wrote:
quoted
On Mon, 2021-12-06 at 17:44 +0000, Martyn Welch wrote:
quoted
On Fri, 2021-12-03 at 17:25 +0100, Andrew Lunn wrote:
quoted
quoted
Hi Andrew,
Adding Russell to Cc:
quoted
I'm currently in the process of updating the GE B850v3
[1] to
run
a
newer kernel than the one it's currently running. 
Which kernel exactly. We like bug reports against net-next,
or
at
least the last -rc.
I tested using v5.15-rc3 and that was also affected.
I've just tested v5.16-rc4 (sorry - just realised I previously
wrote
v5.15-rc3, it was v5.16-rc3...) and that was exactly the same.
Just to clarify: you're saying that you're on v5.16-rc4 and that
if
you
revert commit 3be98b2d5fbc ("net: dsa: Down cpu/dsa ports phylink
will
control"), the link works again?
Correct
quoted
It is a bit strange that the external ports negotiate at
10Mbps/Full,
is that the link speed you intend the ports to work at?
Yes, that's 100% intentional due to what's connected to to those
ports
and the environment it works in.

Martyn
Just out of curiosity, can you try this change? It looks like a
simple
case of mismatched conditions inside the mv88e6xxx driver between
what
is supposed to force the link down and what is supposed to force it
up:
diff --git a/net/dsa/port.c b/net/dsa/port.c
index 20f183213cbc..d235270babf7 100644
--- a/net/dsa/port.c
+++ b/net/dsa/port.c
@@ -1221,7 +1221,7 @@ int dsa_port_link_register_of(struct dsa_port
*dp)
                if (of_phy_is_fixed_link(dp->dn) || phy_np) {
                        if (ds->ops->phylink_mac_link_down)
                                ds->ops->phylink_mac_link_down(ds,
port,
-                                       MLO_AN_FIXED,
PHY_INTERFACE_MODE_NA);
+                                       MLO_AN_PHY,
PHY_INTERFACE_MODE_NA);
                        return dsa_port_phylink_register(dp);
                }
                return 0;
Yes, that appears to also make it work.

Martyn
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