[PATCH net-next v3 13/14] ravb: Update ravb_emac_init_gbeth()
From: Biju Das <biju.das.jz@bp.renesas.com>
Date: 2021-10-12 16:37:10
Also in:
linux-renesas-soc
Subsystem:
networking drivers, renesas ethernet avb driver, the rest · Maintainers:
Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Niklas Söderlund, Linus Torvalds
This patch enables Receive/Transmit port of TOE and removes the setting of promiscuous bit from EMAC configuration mode register. This patch also update EMAC configuration mode comment from "PAUSE prohibition" to "EMAC Mode: PAUSE prohibition; Duplex; TX; RX; CRC Pass Through". Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- v2->v3: * Enabled TPE/RPE of TOE, as disabling causes loopback test to fail * Documented CSR0 register bits * Removed PRM setting from EMAC configuration mode * Updated EMAC configuration mode. v1->v2: * No change V1: * New patch. --- drivers/net/ethernet/renesas/ravb.h | 6 ++++++ drivers/net/ethernet/renesas/ravb_main.c | 5 +++-- 2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/renesas/ravb.h b/drivers/net/ethernet/renesas/ravb.h
index 69a771526776..08062d73df10 100644
--- a/drivers/net/ethernet/renesas/ravb.h
+++ b/drivers/net/ethernet/renesas/ravb.h@@ -204,6 +204,7 @@ enum ravb_reg { TLFRCR = 0x0758, RFCR = 0x0760, MAFCR = 0x0778, + CSR0 = 0x0800, /* RZ/G2L only */ };
@@ -964,6 +965,11 @@ enum CXR31_BIT { CXR31_SEL_LINK1 = 0x00000008, }; +enum CSR0_BIT { + CSR0_TPE = 0x00000010, + CSR0_RPE = 0x00000020, +}; + #define DBAT_ENTRY_NUM 22 #define RX_QUEUE_OFFSET 4 #define NUM_RX_QUEUE 2
diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c
index 21fb83f209d5..f3f676e433d1 100644
--- a/drivers/net/ethernet/renesas/ravb_main.c
+++ b/drivers/net/ethernet/renesas/ravb_main.c@@ -519,10 +519,10 @@ static void ravb_emac_init_gbeth(struct net_device *ndev) /* Receive frame limit set register */ ravb_write(ndev, GBETH_RX_BUFF_MAX + ETH_FCS_LEN, RFLR); - /* PAUSE prohibition */ + /* EMAC Mode: PAUSE prohibition; Duplex; TX; RX; CRC Pass Through */ ravb_write(ndev, ECMR_ZPF | ((priv->duplex > 0) ? ECMR_DM : 0) | ECMR_TE | ECMR_RE | ECMR_RCPT | - ECMR_TXF | ECMR_RXF | ECMR_PRM, ECMR); + ECMR_TXF | ECMR_RXF, ECMR); ravb_set_rate_gbeth(ndev);
@@ -534,6 +534,7 @@ static void ravb_emac_init_gbeth(struct net_device *ndev) /* E-MAC status register clear */ ravb_write(ndev, ECSR_ICD | ECSR_LCHNG | ECSR_PFRI, ECSR); + ravb_write(ndev, CSR0_TPE | CSR0_RPE, CSR0); /* E-MAC interrupt enable register */ ravb_write(ndev, ECSIPR_ICDIP, ECSIPR);
--
2.17.1