Thread (3 messages) read the whole thread 3 messages, 2 authors, 2021-09-22

stmmac: Disappointing or normal DMA performance?

From: John Smith <hidden>
Date: 2021-09-22 08:49:09

I have a one-way 300Mbs traffic RGMII arriving at a stmmac version
3.7, in the form of 30000 1280-byte frames per second, evenly spread.

In NAPI poll mode, at each DMA interrupt, I get around 10 frames. More
precisely:

In stmmac_rx of stmmac_main.c:

static int stmmac_rx(struct stmmac_priv *priv, int limit) {
...
while (count < limit)

count is around 10 when NAPI limit/weight is 64. It means that I get
3000 DMA IRQs per second for my 30000 packets.

I have tried different settings but I can't do anything better.
"Better" meaning that I would like to have fewer interrupts per
second, so a higher number of frames on each interrupt in order to
minimize the load transferred to my CPU.

Everything else being the same, if I send 10000 1280x3=3840-byte
frames per second, I get around 3 or 4 frames per interrupt.

Is there a way to increase the ratio of packets / IRQs? I want fewer
IRQs with more packets as the current performance overloads my
embedded chip,

John
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