On Mon, Jan 25, 2021 at 10:35 AM Edwin Peer [off-list ref] wrote:

quoted

Several weeks back, Jason already answered this VF scaling question from you at discussion [1].

[1] https://lore.kernel.org/netdev/20201216023928.GG552508@nvidia.com/ (local)

Regarding these costs:

A lot of the trappings that PCI-SIG requires to be implemented in HW
for a VF, like PCI config space, MSI tables, BAR space, etc. is all
just dead weight when scaling up to 1000's of VFs.

What do these amount to in practice? Presumably config space is backed
by normal memory controlled by firmware. Do VF's need to expose ECAM?
Also, don't MSI tables come out of the BAR budget? Is the required BAR
space necessarily more than any other addressable unit that can be
delegated to a SF?

Whatever the costs, presumably they need to be weighed against the
complexity costs of the alternative?

Regards,
Edwin Peer