From: Andrew Lunn <andrew@lunn.ch>

SMI0 is a mangled version of MDIO. The main low level difference is
the MDIO C22 OP code is always 0, not 0x2 or 0x1 for Read/Write. The
read/write information is instead encoded in the PHY address.

Extend the bit-bang code to allow the op code to be overridden, but
default to normal C22 values. Add an extra compatible to the mdio-gpio
driver, and when this compatible is present, set the op codes to 0.

A higher level driver, sitting on top of the basic MDIO bus driver can
then implement the rest of the microchip SMI0 odderties.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Michael Grzeschik <redacted>
---
  drivers/net/phy/mdio-bitbang.c |  7 ++-----
  drivers/net/phy/mdio-gpio.c    | 13 +++++++++++++
  include/linux/mdio-bitbang.h   |  2 ++
  3 files changed, 17 insertions(+), 5 deletions(-)

diff --git a/drivers/net/phy/mdio-bitbang.c b/drivers/net/phy/mdio-bitbang.c
index 5136275c8e7399..11255460ecb933 100644
--- a/drivers/net/phy/mdio-bitbang.c
+++ b/drivers/net/phy/mdio-bitbang.c

@@ -19,9 +19,6 @@
  #include <linux/types.h>
  #include <linux/delay.h>
  
-#define MDIO_READ 2
-#define MDIO_WRITE 1
-
  #define MDIO_C45 (1<<15)
  #define MDIO_C45_ADDR (MDIO_C45 | 0)
  #define MDIO_C45_READ (MDIO_C45 | 3)

@@ -158,7 +155,7 @@ static int mdiobb_read(struct mii_bus *bus, int phy, int reg)
  		reg = mdiobb_cmd_addr(ctrl, phy, reg);
  		mdiobb_cmd(ctrl, MDIO_C45_READ, phy, reg);
  	} else
-		mdiobb_cmd(ctrl, MDIO_READ, phy, reg);
+		mdiobb_cmd(ctrl, ctrl->op_c22_read, phy, reg);
  
  	ctrl->ops->set_mdio_dir(ctrl, 0);
  

@@ -189,7 +186,7 @@ static int mdiobb_write(struct mii_bus *bus, int phy, int reg, u16 val)
  		reg = mdiobb_cmd_addr(ctrl, phy, reg);
  		mdiobb_cmd(ctrl, MDIO_C45_WRITE, phy, reg);
  	} else
-		mdiobb_cmd(ctrl, MDIO_WRITE, phy, reg);
+		mdiobb_cmd(ctrl, ctrl->op_c22_write, phy, reg);