Re: [PATCH 07/14] net: ks8851: Use 16-bit writes to program MAC address

On 3/24/20 1:36 PM, Lukas Wunner wrote:

On Tue, Mar 24, 2020 at 01:25:53PM +0100, Andrew Lunn wrote:

quoted

On Tue, Mar 24, 2020 at 09:13:11AM +0100, Lukas Wunner wrote:

quoted

On Tue, Mar 24, 2020 at 12:42:56AM +0100, Marek Vasut wrote:

quoted

On the SPI variant of KS8851, the MAC address can be programmed with
either 8/16/32-bit writes. To make it easier to support the 16-bit
parallel option of KS8851 too, switch both the MAC address programming
and readout to 16-bit operations.

[...]

quoted

 static int ks8851_write_mac_addr(struct net_device *dev)
 {
 	struct ks8851_net *ks = netdev_priv(dev);
+	u16 val;
 	int i;
 
 	mutex_lock(&ks->lock);

@@ -358,8 +329,12 @@ static int ks8851_write_mac_addr(struct net_device *dev)
 	 * the first write to the MAC address does not take effect.
 	 */
 	ks8851_set_powermode(ks, PMECR_PM_NORMAL);
-	for (i = 0; i < ETH_ALEN; i++)
-		ks8851_wrreg8(ks, KS_MAR(i), dev->dev_addr[i]);
+
+	for (i = 0; i < ETH_ALEN; i += 2) {
+		val = (dev->dev_addr[i] << 8) | dev->dev_addr[i + 1];
+		ks8851_wrreg16(ks, KS_MAR(i + 1), val);
+	}
+

This looks like it won't work on little-endian machines:  The MAC bytes
are stored in dev->dev_addr as 012345, but in the EEPROM they're stored
as 543210.  The first 16-bit value that you write is 10 on big-endian
and 01 on little-endian if I'm not mistaken.

By only writing 8-bit values, the original author elegantly sidestepped
this issue.

Maybe the simplest and most readable solution is something like:

      u8 val[2];
      ...
      val[0] = dev->dev_addr[i+1];
      val[1] = dev->dev_addr;

Then cast val to a u16 when passing it to ks8851_wrreg16().

Alternatively, use cpu_to_be16().

There is a cpu_to_be16() inside ks8851_wrreg16(). Something i already
checked, because i wondered about endianess issues as well.

There's a cpu_to_le16() in ks8851_wrreg16(), not a cpu_to_be16().

I have a feeling this whole thing might be more messed up then we
thought. At least the KS8851-16MLL has an "endian mode" bit in the CCR
register, the SPI variant does not.

So what I think you need to do here is write exactly the registers
0x14/0x12/0x10 and let the accessors swap the endianness as needed.