Re: [PATCH 5/7] MIPS: mscc: ocelot: add GPIO4 pinmuxing DT node

From
Alexandre Belloni <alexandre.belloni@bootlin.com>
Date
2018-09-14 18:02:37
Also in
linux-devicetree, linux-mips, lkml
Reply to
Quentin Schulz, 2018-09-14
On 14/09/2018 18:26:38+0200, Quentin Schulz wrote:
Hi Alexandre,

On Fri, Sep 14, 2018 at 04:54:46PM +0200, Alexandre Belloni wrote:
quoted
Hi,

On 14/09/2018 11:44:26+0200, Quentin Schulz wrote:
quoted
In order to use GPIO4 as a GPIO, we need to mux it in this mode so let's
declare a new pinctrl DT node for it.

Signed-off-by: Quentin Schulz <redacted>
---
 arch/mips/boot/dts/mscc/ocelot.dtsi | 5 +++++
 1 file changed, 5 insertions(+)
diff --git a/arch/mips/boot/dts/mscc/ocelot.dtsi b/arch/mips/boot/dts/mscc/ocelot.dtsi
index 8ce317c..b5c4c74 100644
--- a/arch/mips/boot/dts/mscc/ocelot.dtsi
+++ b/arch/mips/boot/dts/mscc/ocelot.dtsi
@@ -182,6 +182,11 @@
 			interrupts = <13>;
 			#interrupt-cells = <2>;
 
+			gpio4: gpio4 {
+				pins = "GPIO_4";
+				function = "gpio";
+			};
+
For a GPIO, I would do that in the board dts because it is not used
directly in the dtsi.
And the day we've two boards using this pinctrl we move it to a dtsi. Is
that the plan?
Not really, at least not for gpios. I've included the pinctrl for the
uart, i2c and spi because they are the only option if you are to use
those peripherals. Else, I've would have left the pinctrl to the board
file. From my point of view, the gpios are too board specific to be in a
soc dtsi.


-- 
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
Thread (33 messages) 33 messages, 6 authors, last reply 2018-10-11
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