Re: [PATCH v3 09/33] nds32: Cache and TLB routines
From: Greentime Hu <hidden>
Date: 2017-12-13 10:05:31
Also in:
linux-arch, linux-devicetree, linux-serial, lkml
From: Greentime Hu <hidden>
Date: 2017-12-13 10:05:31
Also in:
linux-arch, linux-devicetree, linux-serial, lkml
2017-12-13 17:45 GMT+08:00 Guo Ren [off-list ref]:
Hello, CPU team could improve the tlbop_*. Eg: Design a hardware internal flag bit for SR_TLB_VPN, tlbop_* will invalid it and mtsr SR_TLB_VPN will valid it. So: On Wed, Dec 13, 2017 at 05:03:33PM +0800, Greentime Hu wrote:quoted
mtsr addr1 NDS32_SR_TLB_VPN interrupt coming mtsr addr2 NDS32_SR_TLB_VPN <- TLB_VPN has been set to addr2mtsr SR_TLB_VPN will valid the flag bitquoted
tlbop_rwr(*pte);tlbop_rwr will invalid SR_TLB_VPN flag bitquoted
interrupt finish tlbop_rwr(*pte); <- it will use the wrong TLB_VPNBecause SR_TLB_VPN is in a invalid state, no operation happen on tlbop_rwr. Then they are atomic safe ,no spin_lock_irq need. :)
Oh, I see. I may propose this idea to our ARCH colleagues for the next version design. Many thanks. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html