[PATCH 4/5] net: mdio-mux-mmioreg: Can handle 8/16/32 bits registers
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From: Corentin Labbe <clabbe.montjoie@gmail.com>
Date: 2017-08-30 17:49:48
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Subsystem:
ethernet phy library, networking drivers, the rest · Maintainers:
Andrew Lunn, Heiner Kallweit, Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Linus Torvalds
Revision v1 of 2 in this series.
Revisions (2)
- v1 current
- v2 [diff vs current]
This patch fix an old information that mdio-mux-mmioreg can only handle 8bit registers. This is not true anymore. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> --- drivers/net/phy/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 5afe6fdcc968..a9d16a3af514 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig@@ -85,7 +85,7 @@ config MDIO_BUS_MUX_MMIOREG parent bus. Child bus selection is under the control of one of the FPGA's registers. - Currently, only 8-bit registers are supported. + Currently, only 8/16/32 bits registers are supported. config MDIO_CAVIUM tristate
--
2.13.5