Thread (10 messages) 10 messages, 3 authors, 2009-07-28

Re: [PATCH V2] CAN: Add Flexcan CAN controller driver

From: Oliver Hartkopp <socketcan@hartkopp.net>
Date: 2009-07-28 14:48:36

Sascha Hauer wrote:
On Tue, Jul 28, 2009 at 04:12:10PM +0200, Oliver Hartkopp wrote:
quoted
Oliver Hartkopp wrote:
quoted
Sascha Hauer wrote:
quoted
quoted
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+
+	if (frame->can_id & CAN_RTR_FLAG)
+		dlc |= MB_CNT_RTR;
+
+	writel(dlc, &regs->cantxfg[TX_BUF_ID].can_dlc);
+	writel(can_id, &regs->cantxfg[TX_BUF_ID].can_id);
Are you sure, that this is correct?
Yes, I am sure, at least on my hardware.
I looked into the writel() macro which does a cpu_to_le32() to the value -
sorry that i did not check this before ...
quoted
Indeed i wonder, if it would make sense to skip the entire struct flexcan_mb
approach and fiddle byte-by-byte inside the registers ...
You'll have to to 32 bit accesses to get it right on little and big
endian.

what we can do is:

writel(can_data[0] << 24 | can_data[1] << 16 | can_data[2] << 8 | can_data[3],
	msg_buf + 0x8);
This looks easier to understand and makes things clear, when you look into the
specification.

Regards,
Oliver
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