On Tue, Mar 29, 2005 at 10:58:56AM -0800, Rick Jones wrote:

<excerpt>

McKinley-type cores (includes Madison, etc.)
do not have indirect branch target hardware.  Instead, indirect
branches are executed as follows:

[...] 

(1) To _guarantee_ correct prediction, the branch register has to be
    loaded way before the indirect branch direction (at least 6
    front-end L1I cache accesses; which is up to 6 bundle-pairs or 36
    instructions, I believe).

That's horrendous. Indirect calls are a performance win vs conditional
branching on more sensible architectures and it's used quite
extensively in various parts of the kernel. It really makes one wonder
if dealing with this quirk is worth the trouble.

-- 
Mathematics is the supreme nostalgia of our time.