Re: Info: NAPI performance at "low" loads
From: Alan Cox <hidden>
Date: 2002-09-19 15:44:13
Also in:
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From: Alan Cox <hidden>
Date: 2002-09-19 15:44:13
Also in:
lkml
On Thu, 2002-09-19 at 16:03, Eric W. Biederman wrote:
If I do an inb to a PCI-X device running at 133Mhz it should come back much faster than an inb from my serial port on the ISA port. What is the reason for the fixed minimum timing?
As far as I can tell the minimum time for the inb/outb is simply the time it takes the bus to respond. The only difference there is that for writel rather than outl you won't wait for the write to complete on the PCI bus just dump it into the fifo if its empty