Re: Info: NAPI performance at "low" loads
From: Eric W. Biederman <hidden>
Date: 2002-09-19 15:13:27
Also in:
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From: Eric W. Biederman <hidden>
Date: 2002-09-19 15:13:27
Also in:
lkml
"David S. Miller" [off-list ref] writes:
From: Alan Cox [off-list ref] Date: 18 Sep 2002 22:15:27 +0100 It doesnt matter what XFree86 is doing. Thats just to load the PCI bus and jam it up to prove the point. It'll change your inb timing Understood. Maybe a more accurate wording would be "a fixed minimum timing".
Why? If I do an inb to a PCI-X device running at 133Mhz it should come back much faster than an inb from my serial port on the ISA port. What is the reason for the fixed minimum timing? Alan asserted there is a posting behavior difference, but that should not affect reads. What is different between mmio and pio to a pci device when doing reads that should make mmio faster? Eric