[PATCH v18 11/13] PCI: Cache PCI DSN into pci_dev->dsn during probe
From: Terry Bowman <hidden>
Date: 2026-07-17 22:29:24
Also in:
linux-acpi, linux-cxl, linux-doc, linux-pci, lkml
Subsystem:
compute express link (cxl), pci subsystem, the rest · Maintainers:
Davidlohr Bueso, Jonathan Cameron, Dave Jiang, Alison Schofield, Vishal Verma, Dan Williams, Bjorn Helgaas, Linus Torvalds
Subsequent CXL error-reporting code paths need to log the PCI Device Serial Number (DSN) as part of trace events emitted from interrupt or panic context. Computing the DSN there via pci_get_dsn() requires PCI configuration space reads, which are slow, can fail when the link is down or frozen, and may not be safe in some contexts. Add a u64 dsn field to struct pci_dev and populate it from pci_get_dsn() during pci_init_capabilities() at probe time via pci_dsn_init(). Only write dev->dsn when the read succeeds. The zero initial value from pci_dev allocation already represents 'no DSN available.' pci_get_dsn() is not modified because it remains a pure config-space read with no side effects on pci_dev. The cache is written exclusively by pci_dsn_init() at probe time. Signed-off-by: Terry Bowman <redacted> --- Changes in v17->v18: - New commit. --- drivers/cxl/core/ras.c | 11 ++++++----- drivers/cxl/core/ras_rch.c | 4 ++-- drivers/cxl/pci.c | 2 +- drivers/pci/probe.c | 14 ++++++++++++++ include/linux/pci.h | 1 + 5 files changed, 24 insertions(+), 8 deletions(-)
diff --git a/drivers/cxl/core/ras.c b/drivers/cxl/core/ras.c
index acf40b2396c3b..69b320c74469c 100644
--- a/drivers/cxl/core/ras.c
+++ b/drivers/cxl/core/ras.c@@ -100,10 +100,10 @@ void cxl_cper_handle_prot_err(struct cxl_cper_prot_err_work_data *data) dport = cxl_find_dport_by_dev(port, &pdev->dev); if (data->severity == AER_CORRECTABLE) - cxl_cper_trace_corr_prot_err(port, dport, pci_get_dsn(pdev), + cxl_cper_trace_corr_prot_err(port, dport, pdev->dsn, &data->ras_cap); else - cxl_cper_trace_uncorr_prot_err(port, dport, pci_get_dsn(pdev), + cxl_cper_trace_uncorr_prot_err(port, dport, pdev->dsn, &data->ras_cap); } EXPORT_SYMBOL_GPL(cxl_cper_handle_prot_err);
@@ -195,7 +195,7 @@ void cxl_do_recovery(struct pci_dev *pdev, struct cxl_port *port, struct cxl_dpo return; } - if (cxl_handle_ras(port, dport, ras_base, pci_get_dsn(pdev))) + if (cxl_handle_ras(port, dport, ras_base, pdev->dsn)) panic("CXL cachemem error"); dev_dbg(&pdev->dev,
@@ -307,7 +307,7 @@ pci_ers_result_t cxl_pci_error_detected(struct pci_dev *pdev, * CXL.mem traffic. */ ue = cxl_handle_ras(port, NULL, to_ras_base(port, NULL), - pci_get_dsn(pdev)); + pdev->dsn); } /*
@@ -339,7 +339,8 @@ static void cxl_handle_proto_error(struct pci_dev *pdev, struct cxl_port *port, struct cxl_dport *dport, int severity) { if (severity == AER_CORRECTABLE) - cxl_handle_cor_ras(port, dport, to_ras_base(port, dport), pci_get_dsn(pdev)); + cxl_handle_cor_ras(port, dport, to_ras_base(port, dport), + pdev->dsn); else cxl_do_recovery(pdev, port, dport); }
diff --git a/drivers/cxl/core/ras_rch.c b/drivers/cxl/core/ras_rch.c
index 0385d2f4a2f66..14bb3bdb2d092 100644
--- a/drivers/cxl/core/ras_rch.c
+++ b/drivers/cxl/core/ras_rch.c@@ -118,8 +118,8 @@ void cxl_handle_rdport_errors(struct pci_dev *pdev) pci_print_aer(pdev, severity, &aer_regs); if (severity == AER_CORRECTABLE) - cxl_handle_cor_ras(dport->port, dport, to_ras_base(port, dport), - pci_get_dsn(pdev)); + cxl_handle_cor_ras(dport->port, dport, + to_ras_base(port, dport), pdev->dsn); else cxl_do_recovery(pdev, dport->port, dport); }
diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
index 6cf1db7b85020..45a994cc782a9 100644
--- a/drivers/cxl/pci.c
+++ b/drivers/cxl/pci.c@@ -807,7 +807,7 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) if (!dvsec) pci_warn(pdev, "Device DVSEC not present, skip CXL.mem init\n"); - mds = cxl_memdev_state_create(&pdev->dev, pci_get_dsn(pdev), dvsec); + mds = cxl_memdev_state_create(&pdev->dev, pdev->dsn, dvsec); if (IS_ERR(mds)) return PTR_ERR(mds); cxlds = &mds->cxlds;
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index dd0abbc63e18d..92ece5ec211f8 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c@@ -2638,6 +2638,19 @@ void pcie_report_downtraining(struct pci_dev *dev) __pcie_print_link_status(dev, false); } +/* + * Cache the Device Serial Number for use in contexts where config-space + * reads are unsafe (interrupt, panic). Process-context callers that + * need a fresh value (e.g. hotplug device replacement) use pci_get_dsn(). + */ +static void pci_dsn_init(struct pci_dev *dev) +{ + u64 dsn = pci_get_dsn(dev); + + if (dsn) + dev->dsn = dsn; +} + static void pci_imm_ready_init(struct pci_dev *dev) { u16 status;
@@ -2674,6 +2687,7 @@ static void pci_init_capabilities(struct pci_dev *dev) pci_rebar_init(dev); /* Resizable BAR */ pci_dev3_init(dev); /* Device 3 capabilities */ pci_ide_init(dev); /* Link Integrity and Data Encryption */ + pci_dsn_init(dev); /* Serial number */ pcie_report_downtraining(dev); pci_init_reset_methods(dev);
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 64b308b6e61c1..48a1622639190 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h@@ -386,6 +386,7 @@ struct pci_dev { unsigned long *dma_alias_mask;/* Mask of enabled devfn aliases */ struct pci_driver *driver; /* Driver bound to this device */ + u64 dsn; /* PCI Device Serial Number */ u64 dma_mask; /* Mask of the bits of bus address this device implements. Normally this is 0xffffffff. You only need to change
--
2.34.1