Re: Errant readings on LM81 with T2080 SoC
From: Chris Packham <Chris.Packham@alliedtelesis.co.nz>
Date: 2021-03-10 21:49:17
Also in:
linux-hwmon, linux-i2c, lkml
On 10/03/21 6:06 pm, Guenter Roeck wrote:
On 3/9/21 6:19 PM, Chris Packham wrote:quoted
On 9/03/21 9:27 am, Chris Packham wrote:quoted
On 8/03/21 5:59 pm, Guenter Roeck wrote:quoted
Other than that, the only other real idea I have would be to monitor the i2c bus.I am in the fortunate position of being able to go into the office and even happen to have the expensive scope at the moment. Now I just need to find a tame HW engineer so I don't burn myself trying to attach the probes.One thing I see on the scope is that when there is a CPU load there appears to be some clock stretching going on (SCL is held low some times). I don't see it without the CPU load. It's hard to correlate a clock stretching event with a bad read or error but it is one area where the SMBUS spec has a maximum that might cause the device to give up waiting.Do you have CONFIG_PREEMPT enabled in your kernel ? But even without that it is possible that the hot loops at the beginning and end of each operation mess up the driver and cause it to sleep longer than intended. Did you try usleep_range() ?
I've been running with and without CONFIG_PREEMPT. The failures happen with both. I did try usleep_range() and still saw failures.
On a side note, can you send me a register dump for the lm81 ? It would be useful for my module test code.
Here you go this is from a largely unconfigured LM81 0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef 00: 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 GGGGGGGGGGGGGGGG 10: 47 81 24 03 94 00 00 00 00 ff ff ff ff ff ff ff G?$??........... 20: bf cb c1 00 c0 47 ec 24 ff ff 65 ff 00 ff 00 ff ???.?G?$..e..... 30: 00 ff 00 ff 00 ff 00 71 a9 7f 7f ff ff 58 01 04 .......q???..X?? 40: 01 08 00 00 00 00 00 50 2f 80 80 01 44 00 00 00 ??.....P/???D... 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 90: 00 81 24 03 94 00 00 00 00 ff ff ff ff ff ff ff .?$??........... a0: bf cb c1 00 c0 47 ec 24 ff ff 65 ff 00 ff 00 ff ???.?G?$..e..... b0: 00 ff 00 ff 00 ff 00 71 a9 7f 7f ff ff 58 01 04 .......q???..X?? c0: 01 00 00 00 00 00 00 50 2f 80 80 01 44 00 00 00 ?......P/???D... d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ This is from a LM81 that's been configured by our application SW with limits appropriate for the platform. 0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef 00: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ 10: ff 81 24 03 94 00 00 00 00 ff ff ff ff ff ff ff ..$............. 20: bf cc c1 00 c0 47 ec 1c ff ff 65 dc b4 ff c0 d3 .....G....e..... 30: ad ff 00 d3 ad 4e 40 71 a9 4b 46 ff ff 58 01 04 .....N@q.KF..X.. 40: 01 08 00 00 00 00 00 f0 2f 80 80 81 44 80 80 80 ......../...D... 50: 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 ................ 60: 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 ................ 70: 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 ................ 80: 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 ................ 90: 80 81 24 03 94 00 00 00 00 ff ff ff ff ff ff ff ..$............. a0: bf cc c1 00 c0 47 ec 1c ff ff 65 dc b4 ff c0 d3 .....G....e..... b0: ad ff 00 d3 ad 4e 40 71 a9 4b 46 ff ff 58 01 04 .....N@q.KF..X.. c0: 01 00 00 00 00 00 00 f0 2f 80 80 81 44 80 80 80 ......../...D... d0: 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 ................ e0: 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 ................ f0: 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 ................