Re: [PATCH 1/3] powerpc/tm: Remove msr_tm_active()

Hi Breno,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on powerpc/next]
[also build test ERROR on v4.17 next-20180615]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Breno-Leitao/powerpc-tm-Remove-msr_tm_active/20180616-015124
base:   https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
config: powerpc-mpc8272_ads_defconfig (attached as .config)
compiler: powerpc-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        GCC_VERSION=7.2.0 make.cross ARCH=powerpc 

All error/warnings (new ones prefixed by >>):

   In file included from arch/powerpc/include/asm/processor.h:13:0,
                    from arch/powerpc/include/asm/thread_info.h:26,
                    from include/linux/thread_info.h:38,
                    from arch/powerpc/include/asm/ptrace.h:158,
                    from arch/powerpc/include/asm/hw_irq.h:12,
                    from arch/powerpc/include/asm/irqflags.h:12,
                    from include/linux/irqflags.h:16,
                    from include/asm-generic/cmpxchg-local.h:6,
                    from arch/powerpc/include/asm/cmpxchg.h:537,
                    from arch/powerpc/include/asm/atomic.h:11,
                    from include/linux/atomic.h:5,
                    from include/linux/rcupdate.h:38,
                    from include/linux/rculist.h:11,
                    from include/linux/pid.h:5,
                    from include/linux/sched.h:14,
                    from arch/powerpc/kernel/process.c:18:
   arch/powerpc/kernel/process.c: In function 'enable_kernel_fp':

quoted

arch/powerpc/include/asm/reg.h:65:23: error: left shift count >= width of type [-Werror=shift-count-overflow]

    #define __MASK(X) (1UL<<(X))
                          ^

quoted

arch/powerpc/include/asm/reg.h:117:18: note: in expansion of macro '__MASK'

    #define MSR_TS_T __MASK(MSR_TS_T_LG) /*  Transaction Transactional */
                     ^~~~~~

quoted

arch/powerpc/include/asm/reg.h:118:22: note: in expansion of macro 'MSR_TS_T'

    #define MSR_TS_MASK (MSR_TS_T | MSR_TS_S)   /* Transaction State bits */
                         ^~~~~~~~

quoted

arch/powerpc/include/asm/reg.h:119:34: note: in expansion of macro 'MSR_TS_MASK'

    #define MSR_TM_ACTIVE(x) (((x) & MSR_TS_MASK) != 0) /* Transaction active? */
                                     ^~~~~~~~~~~

quoted

arch/powerpc/kernel/process.c:244:7: note: in expansion of macro 'MSR_TM_ACTIVE'

      if(!MSR_TM_ACTIVE(cpumsr) && MSR_TM_ACTIVE(current->thread.regs->msr))
          ^~~~~~~~~~~~~

quoted

arch/powerpc/include/asm/reg.h:65:23: error: left shift count >= width of type [-Werror=shift-count-overflow]

    #define __MASK(X) (1UL<<(X))
                          ^
   arch/powerpc/include/asm/reg.h:116:18: note: in expansion of macro '__MASK'
    #define MSR_TS_S __MASK(MSR_TS_S_LG) /*  Transaction Suspended */
                     ^~~~~~

quoted

arch/powerpc/include/asm/reg.h:118:33: note: in expansion of macro 'MSR_TS_S'

    #define MSR_TS_MASK (MSR_TS_T | MSR_TS_S)   /* Transaction State bits */
                                    ^~~~~~~~

quoted

arch/powerpc/include/asm/reg.h:119:34: note: in expansion of macro 'MSR_TS_MASK'

    #define MSR_TM_ACTIVE(x) (((x) & MSR_TS_MASK) != 0) /* Transaction active? */
                                     ^~~~~~~~~~~

quoted

arch/powerpc/kernel/process.c:244:7: note: in expansion of macro 'MSR_TM_ACTIVE'

      if(!MSR_TM_ACTIVE(cpumsr) && MSR_TM_ACTIVE(current->thread.regs->msr))
          ^~~~~~~~~~~~~

quoted

arch/powerpc/include/asm/reg.h:65:23: error: left shift count >= width of type [-Werror=shift-count-overflow]

    #define __MASK(X) (1UL<<(X))
                          ^

quoted

arch/powerpc/include/asm/reg.h:117:18: note: in expansion of macro '__MASK'

    #define MSR_TS_T __MASK(MSR_TS_T_LG) /*  Transaction Transactional */
                     ^~~~~~

quoted

arch/powerpc/include/asm/reg.h:118:22: note: in expansion of macro 'MSR_TS_T'

    #define MSR_TS_MASK (MSR_TS_T | MSR_TS_S)   /* Transaction State bits */
                         ^~~~~~~~

quoted

arch/powerpc/include/asm/reg.h:119:34: note: in expansion of macro 'MSR_TS_MASK'

    #define MSR_TM_ACTIVE(x) (((x) & MSR_TS_MASK) != 0) /* Transaction active? */
                                     ^~~~~~~~~~~
   arch/powerpc/kernel/process.c:244:32: note: in expansion of macro 'MSR_TM_ACTIVE'
      if(!MSR_TM_ACTIVE(cpumsr) && MSR_TM_ACTIVE(current->thread.regs->msr))
                                   ^~~~~~~~~~~~~

quoted

arch/powerpc/include/asm/reg.h:65:23: error: left shift count >= width of type [-Werror=shift-count-overflow]

    #define __MASK(X) (1UL<<(X))
                          ^
   arch/powerpc/include/asm/reg.h:116:18: note: in expansion of macro '__MASK'
    #define MSR_TS_S __MASK(MSR_TS_S_LG) /*  Transaction Suspended */
                     ^~~~~~

quoted

arch/powerpc/include/asm/reg.h:118:33: note: in expansion of macro 'MSR_TS_S'

    #define MSR_TS_MASK (MSR_TS_T | MSR_TS_S)   /* Transaction State bits */
                                    ^~~~~~~~

quoted

arch/powerpc/include/asm/reg.h:119:34: note: in expansion of macro 'MSR_TS_MASK'

    #define MSR_TM_ACTIVE(x) (((x) & MSR_TS_MASK) != 0) /* Transaction active? */
                                     ^~~~~~~~~~~
   arch/powerpc/kernel/process.c:244:32: note: in expansion of macro 'MSR_TM_ACTIVE'
      if(!MSR_TM_ACTIVE(cpumsr) && MSR_TM_ACTIVE(current->thread.regs->msr))
                                   ^~~~~~~~~~~~~
   arch/powerpc/kernel/process.c: In function 'restore_math':

quoted

arch/powerpc/include/asm/reg.h:65:23: error: left shift count >= width of type [-Werror=shift-count-overflow]

    #define __MASK(X) (1UL<<(X))
                          ^

quoted

arch/powerpc/include/asm/reg.h:117:18: note: in expansion of macro '__MASK'

    #define MSR_TS_T __MASK(MSR_TS_T_LG) /*  Transaction Transactional */
                     ^~~~~~

quoted

arch/powerpc/include/asm/reg.h:118:22: note: in expansion of macro 'MSR_TS_T'

    #define MSR_TS_MASK (MSR_TS_T | MSR_TS_S)   /* Transaction State bits */
                         ^~~~~~~~

quoted

arch/powerpc/include/asm/reg.h:119:34: note: in expansion of macro 'MSR_TS_MASK'

    #define MSR_TM_ACTIVE(x) (((x) & MSR_TS_MASK) != 0) /* Transaction active? */
                                     ^~~~~~~~~~~
   arch/powerpc/kernel/process.c:527:7: note: in expansion of macro 'MSR_TM_ACTIVE'
     if (!MSR_TM_ACTIVE(regs->msr) &&
          ^~~~~~~~~~~~~

vim +/MSR_TM_ACTIVE +244 arch/powerpc/kernel/process.c

   226	
   227	void enable_kernel_fp(void)
   228	{
   229		unsigned long cpumsr;
   230	
   231		WARN_ON(preemptible());
   232	
   233		cpumsr = msr_check_and_set(MSR_FP);
   234	
   235		if (current->thread.regs && (current->thread.regs->msr & MSR_FP)) {
   236			check_if_tm_restore_required(current);
   237			/*
   238			 * If a thread has already been reclaimed then the
   239			 * checkpointed registers are on the CPU but have definitely
   240			 * been saved by the reclaim code. Don't need to and *cannot*
   241			 * giveup as this would save  to the 'live' structure not the
   242			 * checkpointed structure.
   243			 */
 > 244			if(!MSR_TM_ACTIVE(cpumsr) && MSR_TM_ACTIVE(current->thread.regs->msr))
   245				return;
   246			__giveup_fpu(current);
   247		}
   248	}
   249	EXPORT_SYMBOL(enable_kernel_fp);
   250	

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