Re: [PATCH 2/3] powerpc/mm/radix: Use ptep_get_and_clear_full when clearing pte for full mm
From: Michael Neuling <hidden>
Date: 2017-02-14 04:17:27
On Thu, 2017-02-09 at 08:28 +0530, Aneesh Kumar K.V wrote:
This helps us to do some optimization for application exit case, where we=
can
skip the DD1 style pte update sequence. =20 Signed-off-by: Aneesh Kumar K.V <redacted>
Tested-by: Michael Neuling <redacted>
--- =C2=A0arch/powerpc/include/asm/book3s/64/pgtable.h | 17 +++++++++++++++++ =C2=A0arch/powerpc/include/asm/book3s/64/radix.h=C2=A0=C2=A0=C2=A0| 23 ++=
++++++++++++++++++++-
quoted hunk ↗ jump to hunk
=C2=A02 files changed, 39 insertions(+), 1 deletion(-) =20diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.hb/arch/powerpc/include/asm/book3s/64/pgtable.h index 6f15bde94da2..e91ada786d48 100644--- a/arch/powerpc/include/asm/book3s/64/pgtable.h +++ b/arch/powerpc/include/asm/book3s/64/pgtable.h@@ -373,6 +373,23 @@ static inline pte_t ptep_get_and_clear(struct mm_str=
uct
*mm,
=C2=A0 return __pte(old);
=C2=A0}
=C2=A0
+#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
+static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
+ =C2=A0=C2=A0=C2=A0=C2=A0unsigned long addr,
+ =C2=A0=C2=A0=C2=A0=C2=A0pte_t *ptep, int full)
+{
+ if (full && radix_enabled()) {
+ /*
+ =C2=A0* Let's skip the DD1 style pte update here. We know that
+ =C2=A0* this is a full mm pte clear and hence can be sure there is
+ =C2=A0* no parallel set_pte.
+ =C2=A0*/
+ return radix__ptep_get_and_clear_full(mm, addr, ptep, full);
+ }
+ return ptep_get_and_clear(mm, addr, ptep);
+}
+
+
=C2=A0static inline void pte_clear(struct mm_struct *mm, unsigned long ad=dr,
quoted hunk ↗ jump to hunk
=C2=A0 =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0pte_t * ptep) =C2=A0{diff --git a/arch/powerpc/include/asm/book3s/64/radix.hb/arch/powerpc/include/asm/book3s/64/radix.h index 70a3cdcdbe47..fcf822d6c204 100644--- a/arch/powerpc/include/asm/book3s/64/radix.h +++ b/arch/powerpc/include/asm/book3s/64/radix.h@@ -139,7 +139,7 @@ static inline unsigned long radix__pte_update(structmm_struct *mm, =C2=A0 =C2=A0 unsigned long new_pte; =C2=A0 - old_pte =3D __radix_pte_update(ptep, ~0, 0); + old_pte =3D __radix_pte_update(ptep, ~0ul, 0); =C2=A0 /* =C2=A0 =C2=A0* new value of pte =C2=A0 =C2=A0*/@@ -157,6 +157,27 @@ static inline unsigned long radix__pte_update(structmm_struct *mm, =C2=A0 return old_pte; =C2=A0} =C2=A0 +static inline pte_t radix__ptep_get_and_clear_full(struct mm_struct *mm, + =C2=A0=C2=A0=C2=A0unsigned long addr, + =C2=A0=C2=A0=C2=A0pte_t *ptep, int full) +{ + unsigned long old_pte; + + if (full) { + /* + =C2=A0* If we are trying to clear the pte, we can skip + =C2=A0* the DD1 pte update sequence and batch the tlb flush. The + =C2=A0* tlb flush batching is done by mmu gather code. We + =C2=A0* still keep the cmp_xchg update to make sure we get + =C2=A0* correct R/C bit which might be updated via Nest MMU. + =C2=A0*/ + old_pte =3D __radix_pte_update(ptep, ~0ul, 0); + } else + old_pte =3D radix__pte_update(mm, addr, ptep, ~0ul, 0, 0); + + return __pte(old_pte); +} + =C2=A0/* =C2=A0 * Set the dirty and/or accessed bits atomically in a linux PTE, th=
is
=C2=A0 * function doesn't need to invalidate tlb.