Re: [PATCH 1/3] powerpc/mm/radix: Update pte update sequence for pte clear case
From: Aneesh Kumar K.V <hidden>
Date: 2017-02-09 04:35:49
Benjamin Herrenschmidt [off-list ref] writes:
On Thu, 2017-02-09 at 14:49 +1100, Benjamin Herrenschmidt wrote:quoted
On Thu, 2017-02-09 at 08:28 +0530, Aneesh Kumar K.V wrote:quoted
In the kernel we do follow the below sequence in different code paths. pte = ptep_get_clear(ptep) .... set_pte_at(ptep, pte) We do that for mremap, autonuma protection update and softdirty clearing. This implies our optimization to skip a tlb flush when clearing a pte update is not valid, because for DD1 system that followup set_pte_at will be done witout doing the required tlbflush. Fix that by always doing the dd1 style pte update irrespective of new_pte value. In a later patch we will optimize the application exit case.What about my change to set_pte_at() ? We seem to be overwriting valid PTEs, shouldn't we deal with that ?So the HW guys confirmed that the TLB will never cache a valid entry that has all permissions clear. That leaves the THP write problem though.
Which is fixed by the autonuma related changes posted at https://lkml.kernel.org/r/1486609259-6796-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com Right now i am running a kernel compile in loop with parallel perf bench numa mem run to make sure we got most of the details correct. (this is on p8) -aneesh