Re: [PATCH V2 23/68] powerpc/mm: Make page table size a variable
From: Aneesh Kumar K.V <hidden>
Date: 2016-04-17 20:45:27
From: Aneesh Kumar K.V <hidden>
Date: 2016-04-17 20:45:27
Balbir Singh [off-list ref] writes:
quoted
index 2f818cbd8aa6..dcb9d6e94a0c 100644--- a/arch/powerpc/include/asm/book3s/64/hash-4k.h +++ b/arch/powerpc/include/asm/book3s/64/hash-4k.h@@ -5,48 +5,20 @@ * for each page table entry. The PMD and PGD level use a 32b record for * each entry by assuming that each entry is page aligned. */ -#define PTE_INDEX_SIZE 9 -#define PMD_INDEX_SIZE 7 -#define PUD_INDEX_SIZE 9 -#define PGD_INDEX_SIZE 9 +#define H_PTE_INDEX_SIZE 9 +#define H_PMD_INDEX_SIZE 7 +#define H_PUD_INDEX_SIZE 9 +#define H_PGD_INDEX_SIZE 9Any comments on where these numbers came from? From these numbers for 4K pages we have Each PMD is 2M Each PUD is 256M Each PGD is 128G
I am not sure I understand. We are updating linux page table details for hash config here. This patch doesn't make any functionality change, it just make sure few #defines are marked as a variable. -aneesh