Thread (32 messages) 32 messages, 6 authors, 2015-10-21

Re: [PATCH v2] barriers: introduce smp_mb__release_acquire and update documentation

From: Peter Zijlstra <peterz@infradead.org>
Date: 2015-10-21 08:24:47
Also in: linux-arch, lkml

On Tue, Oct 20, 2015 at 04:34:51PM -0700, Paul E. McKenney wrote:
There is also the question of whether the barrier forces ordering
of unrelated stores, everything initially zero and all accesses
READ_ONCE() or WRITE_ONCE():

	P0		P1		P2		P3
	X = 1;		Y = 1;		r1 = X;		r3 = Y;
					some_barrier();	some_barrier();
					r2 = Y;		r4 = X;

P2's and P3's ordering could be globally visible without requiring
P0's and P1's independent stores to be ordered, for example, if you
used smp_rmb() for some_barrier().  In contrast, if we used smp_mb()
for barrier, everyone would agree on the order of P0's and P0's stores.
Oh!?
There are actually a fair number of different combinations of
aspects of memory ordering.  We will need to choose wisely.  ;-)

My hope is that the store-ordering gets folded into the globally
visible transitive level.  Especially given that I have not (yet)
seen any algorithms used in production that relied on the ordering of
independent stores.
I would hope not, that's quite insane.
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