On Thu, 2014-10-02 at 11:57 +1000, Michael Ellerman wrote:
On Tue, 2014-30-09 at 10:34:55 UTC, Michael Neuling wrote:
quoted
From: Ian Munsie <redacted>
=20
Some of the MSI IRQ code in pnv_pci_ioda_msi_setup() is generically use=
ful so
quoted
split it out.
=20
This will be used by some of the cxl PCIe code later.
=20
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/p=
latforms/powernv/pci-ioda.c
quoted
index df241b1..329164f 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -1306,14 +1306,36 @@ static void pnv_ioda2_msi_eoi(struct irq_data *=
d)
quoted
icp_native_eoi(d);
}
=20
+
+static void set_msi_irq_chip(struct pnv_phb *phb, unsigned int virq)
+{
+ struct irq_data *idata;
+ struct irq_chip *ichip;
+
+ if (phb->type !=3D PNV_PHB_IODA2)
+ return;
+
+ /*
+ * Change the IRQ chip for the MSI interrupts on PHB3.
+ * The corresponding IRQ chip should be populated for
+ * the first time.
=20
Seeing as you're moving this comment can you clarify the wording.
Ok.
Mikey