Re: [PATCH V7 1/3] powerpc/pci: Make sure ISA IO base is not zero

On 08/15/2012 04:32 PM, Benjamin Herrenschmidt wrote:

On Wed, 2012-08-15 at 12:29 -0500, Scott Wood wrote:

quoted

quoted

---
 arch/powerpc/kernel/pci-common.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 0f75bd5..2a09aa5 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c

@@ -734,7 +734,7 @@ void __devinit pci_process_bridge_OF_ranges(struct pci_controller *hose,
 			hose->io_base_virt = ioremap(cpu_addr, size);
 
 			/* Expect trouble if pci_addr is not 0 */
-			if (primary)
+			if (primary || !isa_io_base)
 				isa_io_base =
 					(unsigned long)hose->io_base_virt;
 #endif /* CONFIG_PPC32 */

Didn't I already point out that this has problems when the primary bus
is not the first to be probed?  If your answer is that you fix that in a
later patch, that breaks bisectability.

Is it though ? ie, we will override it with the real primary in the
above test, so it will only very temporarily be set to the "wrong" bus
no ? IE, the test will still trip on the actual "primary" if there's
one

Is there no lasting remnant of that temporary wrong isa_io_base?  We
won't have I/O resources that were calculated relative to that, which
stop working once isa_io_base changes?  Or does that happen later, after
this function has been called on all buses (and would that continue to
be the case if we change the PCI bus to a platform device)?

-Scott