Thread (47 messages) flat view 47 messages, 4 authors, 2012-07-24

Re: [PATCH -V3 10/11] arch/powerpc: Use 32bit array for slb cache

From: Aneesh Kumar K.V <hidden>
Date: 2012-07-23 08:25:46

Paul Mackerras [off-list ref] writes:
On Mon, Jul 09, 2012 at 06:43:40PM +0530, Aneesh Kumar K.V wrote:
quoted
From: "Aneesh Kumar K.V" <redacted>

With larger vsid we need to track more bits of ESID in slb cache
for slb invalidate.

Signed-off-by: Aneesh Kumar K.V <redacted>
Minor comment below, but apart from that...

Reviewed-by: Paul Mackerras <redacted>
quoted
-	sldi	r11,r3,1		/* r11 = offset * sizeof(u16) */
-	rldicl	r10,r10,36,28		/* get low 16 bits of the ESID */
-	add	r11,r11,r13		/* r11 = (u16 *)paca + offset */
-	sth	r10,PACASLBCACHE(r11)	/* paca->slb_cache[offset] = esid */
+	sldi	r11,r3,2		/* r11 = offset * sizeof(u32) */
+	rldicl	r10,r10,36,28		/* get the 36 bits of the ESID */
You're correct that the rldicl instruction produces 36 bits of result,
and in fact it is equivalent to srdi r10,r10,28.  If you're changing
the line you might as well change the instruction to the simpler form
too.
done.

-aneesh
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