On 11/29/2011 03:40 PM, Artem Bityutskiy wrote:

On Thu, 2011-11-24 at 08:24 -0600, Kumar Gala wrote:

quoted

On Nov 22, 2011, at 9:41 PM, Kumar Gala wrote:

quoted

On Oct 31, 2011, at 4:38 AM, [off-list ref] [off-list ref] wrote:

quoted

From: Liu Shuo <redacted>

Integrated Flash Controller supports various flashes like NOR, NAND
and other devices using NOR, NAND and GPCM Machine available on it.
IFC supports four chip selects.

Signed-off-by: Dipen Dudhat <redacted>
Signed-off-by: Scott Wood <redacted>
Signed-off-by: Li Yang <redacted>
Signed-off-by: Liu Shuo <redacted>
---
arch/powerpc/Kconfig               |    4 +
arch/powerpc/include/asm/fsl_ifc.h |  834 ++++++++++++++++++++++++++++++++++++
arch/powerpc/sysdev/Makefile       |    1 +
arch/powerpc/sysdev/fsl_ifc.c      |  322 ++++++++++++++
4 files changed, 1161 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/include/asm/fsl_ifc.h
create mode 100644 arch/powerpc/sysdev/fsl_ifc.c

Guys,

How are we handling this patchset since it touches drivers/mtd/nand?

I do not see it touching MTD from the diffstat above. I am a little bit
confused why a flash controller is added to
arch/powerpc/sysdev/fsl_ifc.c ?

It's really a bus controller, with NOR, NAND, and general-purpose modes
settable per chipselect.  The actual NAND driver goes in
drivers/mtd/nand, and is apparently in a separate patch (probably due to
separate maintenance domains).

It's the same situation as arch/powerpc/sysdev/fsl_lbc.c versus
drivers/mtd/nand/fsl_elbc_nand.c and drivers/mtd/nand/fsl_upm.c.

-Scott