Thread (6 messages) flat view 6 messages, 2 authors, 2008-07-16

Re: SW TLB MMU rework and SMP issues (pte read/write)

From: Kumar Gala <hidden>
Date: 2008-07-16 22:16:25

On Jul 16, 2008, at 4:41 PM, Benjamin Herrenschmidt wrote:
On Wed, 2008-07-16 at 15:57 -0500, Kumar Gala wrote:
quoted
This makes sense.  I think we need to order the stores in set_pte_at
regardless of CONFIG_SMP.
Nah, that shouldn't be necessary.
Yeah I finally came to that realization.
quoted
Also, I think we should change pte_clear to
use pte_update() so we only clear the low-order flag bits.  Patch  
will
be sent shortly for review.
Well... at one point at least we did rely on a PTE page with all PTEs
cleared to be blank. It don't know if that's still the case, I need to
look.
Doesn't look like we do anything special, we just call free_pages or  
__free_pages in arch/powerpc/mm/pgtable_32.c.

- k
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