SW TLB MMU rework and SMP issues

Ben,

I've been giving some thought to the new software managed TLBs and SMP  
issues.  I was wondering if you had any insights on how we should deal  
with the following issues:

* tlb invalidates -- need to ensure we don't have multiple tlbsync's  
on the bus.  I'm thinking for e500/fsl we will move to IPI based  
invalidate broadcast and do invalidates locally (http://patchwork.ozlabs.org/linuxppc/patch?id=19657 
)

* 64-bit PTEs and reader vs writer hazards.  How do we ensure that the  
TLB miss handler samples a consistent view of the pte.  pte_updates  
seem ok since we only update the flag word.  However set_pte_at seems  
like it could be problematic.

- k