Thread (6 messages) flat view 6 messages, 2 authors, 2008-07-16

Re: SW TLB MMU rework and SMP issues (pte read/write)

From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: 2008-07-16 21:45:30

On Wed, 2008-07-16 at 15:57 -0500, Kumar Gala wrote:
This makes sense.  I think we need to order the stores in set_pte_at  
regardless of CONFIG_SMP. 
Nah, that shouldn't be necessary.
 Also, I think we should change pte_clear to  
use pte_update() so we only clear the low-order flag bits.  Patch will  
be sent shortly for review.
Well... at one point at least we did rely on a PTE page with all PTEs
cleared to be blank. It don't know if that's still the case, I need to
look.

Ben.
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