Re: [PATCH 1/2] ibm_newemac: PowerPC 440GX EMAC PHY clock workaround
From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: 2008-03-29 03:36:24
Also in:
netdev
From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: 2008-03-29 03:36:24
Also in:
netdev
On Fri, 2008-03-28 at 22:18 -0400, Jeff Garzik wrote:
Valentine Barshak wrote:quoted
The PowerPC 440GX Taishan board fails to reset EMAC3 (reset timeout error) if there's no link. Because of that it fails to find PHY chip. The older ibm_emac driver had a workaround for that: the EMAC_CLK_INTERNAL/EMAC_CLK_EXTERNAL macros, which toggle the Ethernet Clock Select bit in the SDR0_MFR register. This patch does the same for "ibm,emac-440gx" compatible chips. The workaround forces clock on -all- EMACs, so we select clock under global emac_phy_map_lock. Signed-off-by: Valentine Barshak <redacted> --- drivers/net/ibm_newemac/core.c | 16 +++++++++++++++- drivers/net/ibm_newemac/core.h | 8 ++++++-- 2 files changed, 21 insertions(+), 3 deletions(-)is this for 2.6.25-rc?
Nah, too late imho. Ben.