RE: fsl booke MM vs. SMP questions

quoted

I also noticed that tlb invalidation on the PowerPC 750 SMP system
is using the IPI mechanism, that is because the 750 can not=20
broadcast tlb invalidation ops.

=20
Do we support that in linux ?

Yes, it support in ppc, but not in powerpc arch. It may miss in the
powerpc when porting.

Not really... it depends on bus traffic, plus the need to spinlock the
broadcast tlbivax as well, etc..
=20
I'm not working on real HW at the moment. I don't know what the exact
characteristics of your target HW are...

BTW, if the x86 processor support the broadcast tlb operation to system?
If it can,  why we adopt the IPI mechanism for x86? what is the concern?

-d