Re: 8360E - PCI / DTC Blob Setup

On Feb 2, 2007, at 07:36, Russell McGuire wrote:

Well I am getting smarter on this:

I have read through the PCI Bridge Specs and found another issue  
that might
have been causing a problem with the IDSEL lines. Unless you are  
interested
I'll forgo that explanation and just go with fact that I have  
changed the
IDSEL mappings to be legal when they are issued from the 83xx.

I have changed the IDSELs to be as follows, does this look correct?
I agree with placing the NODE for the bridge into the dts file to be
correct. Except I get stuck immediately at trying to come up with an
address. I.e. the PCI host has a PCI@8500, which makes sense. But  
the Bridge
chip doesn't have a mapped address to place in the file. I did read  
the PCI
OF node spec <dated 1996> it hints that PCI-PCI bridges are  
essentially the
same domain and may not need translation.

Another concern I have now is that the interrupt mask may be  
incorrect.
i.e. currently it is <f800 0 0 7>, should I change this to <3f800 0  
0 7>
since I am using an extra 2 bits to indicate bus? This would make  
sense if
the ((Bus << 16) | Dev << 11))

Yeah, you need to do that.  Take a look at mpc8548cds.dts.  We have a  
mapping for the VIA chip hanging off a P2P bridge on PCI1.  But I  
think you've pretty much got it figured out.  Just sending you a  
"working" example (we've got it working internally, now, we just need  
to find the right code path.  But the dts is correct).


Andy