Thread (23 messages) flat view 23 messages, 4 authors, 2007-02-08

Re: 8360E - PCI / DTC Blob Setup

From: Kumar Gala <hidden>
Date: 2007-02-01 14:33:58

On Feb 1, 2007, at 8:27 AM, Russell McGuire wrote:
Since I am hip deep in debugging the PCI system.

In the .dts files there is the section for the PCI setup.

The interrupt-map = < >

Does this need to include:
1) A mapping for every IDSEL line in the system?
2) Only those IDSELs that are used on the slots on the motherboard?
I'm not sure I follow the difference between 1/2. The map needs to  
cover every IDSEL that has an IRQ line wired to it.
3) A custom entry for every card we want to support?
See above.
4) How does a bridge chip and slave busses affect the entries, if  
at all?
Uugh, I'm not sure how bridges are handled at this point.
Looking at the mpc8360 / 8349 setups that are part of the latest  
kernel
trees, some are place many and some are placing just a single entry?

Which should be the preferred method?
It depends on your HW setup, the 8360/49 boards have some 'odd' IDSEL  
irq mapping.

- k
Keyboard shortcuts
hback out one level
jnext message in thread
kprevious message in thread
ldrill in
Escclose help / fold thread tree
?toggle this help