Re: [PATCH 1/2] Add MPC52xx Interrupt controller support for ARCH=powerpc
From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: 2006-11-01 20:56:55
From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: 2006-11-01 20:56:55
In my opinion, as it reflects a bit better hwow the hw itself is architectured (critical, main, peripheral...) it's better to do it like this. I do not wish to change this. Moreover, it's yet working pretty well.
I disagree completely here. The HW works the way the registers are laid out. The -whole-point- of doing that Level1 vs. Level2 thing was to abstract is such that Level1 represents the register set used. Now, what you essentially did is split is so that one Level1 is a special case of one register set, the second Level1 can be either the rest of that register or another, and 3 and 4 are properly separate register sets. That makes no sense at all.
It normaly does not compile if I remove it as state earlier. I'll remove them and fixed the compile issue.quoted
if defined(CONFIG_PPC_MPC52xx) && !defined(CONFIG_PPC_MERGE)
It compiles if you also fixup asm-ppc/io.h by doing the above.
Will be removed and replace by another define to reflect the highest virq (0xd0). #define MPC52xx_IRQ_MACVIRQ (0xd0) sounds ok ?
No, it's not a V irq, it's a HW irq number. (and MAC vs. MAX ?) Ben