Re: IBM 750GX SMP on Marvell Discovery II or III?

On Wed, 12 May 2004, Bryan Rittmeyer wrote:

On Wed, May 12, 2004 at 04:21:04PM +0200, Geert Uytterhoeven wrote:

quoted

Solution: divide memory in pieces, run multiple instances of Linux, each on its
own CPU and memory piece, and use a piece of uncached RAM for implementing
communication channels between CPUs ;-)

Non-cacheable I/O throughput on the 60x bus is horrid; might be better to put a
1000Mbps NIC on each CPU and cable em together ;-\

You can always put the real data in cacheable memory, and keep only some
control descriptors in uncached memory. Needs some explicit cache handling, but
should be faster.

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

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