Amit Shah writes:
I was wondering if SMP is supported for the 750 GX processor built on the
Marvell Discovery boards.
SMP is not supported for 750 processors.
If not, what's the problem in getting it supported? An older mail by Cort
Dougan said it was because of TLB invalidate information not being
broadcasted, but it was a really old mail, has anyone come up with any
workarounds?
The real killer is that the cache management instructions are not
broadcast. The fact that the TLB invalidations are not broadcast is
painful but it can be worked around in the kernel. In contrast, the
cache management instructions are used in userspace.
Paul.
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