[RFC][PATCH 10/10] bcm47xx: fix irq assignment for new SoCs.
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: 2011-06-05 22:12:33
Also in:
linux-mips
Subsystem:
broadcom bcm47xx mips architecture, mips, the rest · Maintainers:
Hauke Mehrtens, Rafał Miłecki, Thomas Bogendoerfer, Linus Torvalds
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> --- arch/mips/bcm47xx/irq.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch/mips/bcm47xx/irq.c b/arch/mips/bcm47xx/irq.c
index 325757a..3642cee 100644
--- a/arch/mips/bcm47xx/irq.c
+++ b/arch/mips/bcm47xx/irq.c@@ -26,6 +26,7 @@ #include <linux/interrupt.h> #include <linux/irq.h> #include <asm/irq_cpu.h> +#include <bcm47xx.h> void plat_irq_dispatch(void) {
@@ -51,5 +52,12 @@ void plat_irq_dispatch(void) void __init arch_init_irq(void) { + if (bcm47xx_active_bus_type == BCM47XX_BUS_TYPE_BCMA) { + bcma_write32(bcm47xx_bus.bcma.drv_mips.core, + BCMA_MIPS_MIPS74K_INTMASK(5), 1 << 31); + /* the kernel reads the timer irq from some register and thinks + * it's #5, but we offset it by 2 and route to #7 */ + cp0_compare_irq = 7; + } mips_cpu_irq_init(); }
--
1.7.4.1