Thread (25 messages) 25 messages, 5 authors, 2021-09-09

Re: [PATCH v5 2/4] arm64: dts: qcom: sc7280: Add PCIe and PHY related nodes

From: Stephen Boyd <hidden>
Date: 2021-08-10 19:32:03
Also in: linux-arm-msm, linux-devicetree, lkml

Quoting Prasad Malisetty (2021-08-09 21:08:34)
quoted hunk ↗ jump to hunk
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 53a21d0..4500d88 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -1598,6 +1712,18 @@
                                        bias-bus-hold;
                                };
                        };
+
+                       pcie1_default_state: pcie1-default-state {
+                               clkreq {
+                                       pins = "gpio79";
+                                       function = "pcie1_clkreqn";
+                               };
+
+                               wake-n {
+                                       pins = "gpio3";
+                                       function = "gpio";
This is function gpio, so presumably board designers could decide to
change the wake gpio to something else, right? I'd prefer we move wake-n
to the board level (idp) as well. gpio79 looks fine as it is muxed to be
the pcie1_clkreqn function, not gpio, so it seems to be a dedicated pin
for this purpose.
Keyboard shortcuts
hback out one level
jnext message in thread
kprevious message in thread
ldrill in
Escclose help / fold thread tree
?toggle this help