Re: [PATCH V2] rtc: mc146818: Dont test for bit 0-5 in Register D
From: Len Brown <lenb@kernel.org>
Date: 2021-02-02 04:23:55
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Thanks for the update, Thomas. V1 prevented rc6 automated suspend/resume testing on all 13 of my local machines. V2 applied, and they are back in business. tested-by: Len Brown <redacted> On Mon, Feb 1, 2021 at 2:25 PM Thomas Gleixner [off-list ref] wrote:
quoted hunk ↗ jump to hunk
The recent change to validate the RTC turned out to be overly tight. While it cures the problem on the reporters machine it breaks machines with Intel chipsets which use bit 0-5 of the D register. So check only for bit 6 being 0 which is the case on these Intel machines as well. Fixes: 211e5db19d15 ("rtc: mc146818: Detect and handle broken RTCs") Reported-by: Serge Belyshev <redacted> Reported-by: Dirk Gouders <redacted> Signed-off-by: Thomas Gleixner <redacted> --- V2: Provide the actual delta patch. Should have stayed away from computers today.... --- drivers/rtc/rtc-cmos.c | 4 ++-- drivers/rtc/rtc-mc146818-lib.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-)--- a/drivers/rtc/rtc-cmos.c +++ b/drivers/rtc/rtc-cmos.c@@ -805,8 +805,8 @@ cmos_do_probe(struct device *dev, struct spin_lock_irq(&rtc_lock); - /* Ensure that the RTC is accessible. Bit 0-6 must be 0! */ - if ((CMOS_READ(RTC_VALID) & 0x7f) != 0) { + /* Ensure that the RTC is accessible. Bit 6 must be 0! */ + if ((CMOS_READ(RTC_VALID) & 0x40) != 0) { spin_unlock_irq(&rtc_lock); dev_warn(dev, "not accessible\n"); retval = -ENXIO; --- a/drivers/rtc/rtc-mc146818-lib.c +++ b/drivers/rtc/rtc-mc146818-lib.c@@ -21,8 +21,8 @@ unsigned int mc146818_get_time(struct rt again: spin_lock_irqsave(&rtc_lock, flags); - /* Ensure that the RTC is accessible. Bit 0-6 must be 0! */ - if (WARN_ON_ONCE((CMOS_READ(RTC_VALID) & 0x7f) != 0)) { + /* Ensure that the RTC is accessible. Bit 6 must be 0! */ + if (WARN_ON_ONCE((CMOS_READ(RTC_VALID) & 0x40) != 0)) { spin_unlock_irqrestore(&rtc_lock, flags); memset(time, 0xff, sizeof(*time)); return 0;
-- Len Brown, Intel Open Source Technology Center