Re: Triple parity and beyond

Hi,

Yep. At present to multiply for 2^-1 I'm using in C:

static inline uint64_t d2_64(uint64_t v)
{
        uint64_t mask = v & 0x0101010101010101U;
        mask = (mask << 8) - mask;
        v = (v >> 1) & 0x7f7f7f7f7f7f7f7fU;
        v ^= mask & 0x8e8e8e8e8e8e8e8eU;
        return v;
}

and for SSE2:

asm volatile("movdqa %xmm2,%xmm4");
asm volatile("pxor %xmm5,%xmm5");
asm volatile("psllw $7,%xmm4");
asm volatile("psrlw $1,%xmm2");
asm volatile("pcmpgtb %xmm4,%xmm5");
asm volatile("pand %xmm6,%xmm2"); with xmm6 == 7f7f7f7f7f7f...
asm volatile("pand %xmm3,%xmm5"); with xmm3 == 8e8e8e8e8e...
asm volatile("pxor %xmm5,%xmm2");

where xmm2 is the intput/output

Ciao,
Andrea

On Wed, Nov 20, 2013 at 7:43 PM, H. Peter Anvin [off-list ref] wrote:

It is also possible to quickly multiply by 2^-1 which makes for an interesting R parity.

Andrea Mazzoleni [off-list ref] wrote:

quoted

Hi David,

quoted

quoted

The choice of ZFS to use powers of 4 was likely not optimal,
because to multiply by 4, it has to do two multiplications by 2.

I can agree with that.  I didn't copy ZFS's choice here

David, it was not my intention to suggest that you copied from ZFS.
Sorry to have expressed myself badly. I just mentioned ZFS because it's
an implementation that I know uses powers of 4 to generate triple
parity, and I saw in the code that it's implemented with two
multiplication
by 2.

Ciao,
Andrea

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