Christoph Lameter [off-list ref] wrote:

On Thu, 25 Aug 2011, James Bottomley wrote:

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On Thu, 2011-08-25 at 10:11 -0500, Christoph Lameter wrote:

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On Thu, 25 Aug 2011, Peter Zijlstra wrote:

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On Thu, 2011-08-18 at 14:40 -0700, Andrew Morton wrote:

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I think I'll apply it, as the call frequency is low (correct?)

and the

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problem will correct itself as other architectures implement

their

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atomic this_cpu_foo() operations.

Which leads me to wonder, can anything but x86 implement that

this_cpu_*

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muck? I doubt any of the risk chips can actually do all this.
Maybe Itanic, but then that seems to be dying fast.

The cpu needs to have an RMW instruction that does something to a
variable relative to a register that points to the per cpu base.

Thats generally possible. The problem is how expensive the RMW is

going to

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be.

Risc systems generally don't have a single instruction for this,

that's

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correct.  Obviously we can do it as a non atomic sequence: read
variable, compute relative, read, modify, write ... but there's
absolutely no point hand crafting that in asm since the compiler can
usually work it out nicely.  And, of course, to have this atomic, we
have to use locks, which ends up being very expensive.

ARM seems to have these LDREX/STREX instructions for that purpose which
seem to be used for generating atomic instructions without lockes. I
guess
other RISC architectures have similar means of doing it?

Arm isn't really risc.  Most don't.  However even with ldrex/strex you need two instructions for rmw.

James
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