Re: [PATCH v2 4/6] clk: ingenic: Remove pll_info.no_bypass_bit

[PATCH v2 0/6] clk: Ingenic JZ4760(B) support · Paul Cercueil <paul@crapouillou.net> · 2021-05-30
[PATCH v2 1/6] dt-bindings: clock: ingenic: Add ingenic,jz4760{,b}-cgu compatibles · Paul Cercueil <paul@crapouillou.net> · 2021-05-30
Re: [PATCH v2 1/6] dt-bindings: clock: ingenic: Add ingenic,jz4760{,b}-cgu compatibles · Stephen Boyd <sboyd@kernel.org> · 2021-06-28
[PATCH v2 2/6] clk: Support bypassing dividers · Paul Cercueil <paul@crapouillou.net> · 2021-05-30
Re: [PATCH v2 2/6] clk: Support bypassing dividers · Stephen Boyd <sboyd@kernel.org> · 2021-06-28
[PATCH v2 3/6] clk: ingenic: Read bypass register only when there is one · Paul Cercueil <paul@crapouillou.net> · 2021-05-30
Re: [PATCH v2 3/6] clk: ingenic: Read bypass register only when there is one · Zhou Yanjie <hidden> · 2021-06-01
Re: [PATCH v2 3/6] clk: ingenic: Read bypass register only when there is one · Stephen Boyd <sboyd@kernel.org> · 2021-06-28
[PATCH v2 4/6] clk: ingenic: Remove pll_info.no_bypass_bit · Paul Cercueil <paul@crapouillou.net> · 2021-05-30
Re: [PATCH v2 4/6] clk: ingenic: Remove pll_info.no_bypass_bit · Zhou Yanjie <hidden> · 2021-06-01
Re: [PATCH v2 4/6] clk: ingenic: Remove pll_info.no_bypass_bit · Stephen Boyd <sboyd@kernel.org> · 2021-06-28
[PATCH v2 5/6] clk: ingenic: Support overriding PLLs M/N/OD calc algorithm · Paul Cercueil <paul@crapouillou.net> · 2021-05-30
Re: [PATCH v2 5/6] clk: ingenic: Support overriding PLLs M/N/OD calc algorithm · Stephen Boyd <sboyd@kernel.org> · 2021-06-28
[PATCH v2 6/6] clk: ingenic: Add support for the JZ4760 · Paul Cercueil <paul@crapouillou.net> · 2021-05-30
Re: [PATCH v2 6/6] clk: ingenic: Add support for the JZ4760 · Stephen Boyd <sboyd@kernel.org> · 2021-06-28
Re: [PATCH v2 6/6] clk: ingenic: Add support for the JZ4760 · Paul Cercueil <paul@crapouillou.net> · 2021-06-30
Re: [PATCH v2 0/6] clk: Ingenic JZ4760(B) support · 周琰杰 <hidden> · 2021-06-22

From: Stephen Boyd <sboyd@kernel.org>
Date: 2021-06-28 02:49:54
Also in: linux-clk, linux-devicetree, lkml

Quoting Paul Cercueil (2021-05-30 09:49:21)

We can express that a PLL has no bypass bit by simply setting the
.bypass_bit field to a negative value.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
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