On Fri, Sep 5, 2014 at 12:05 PM, Thomas Gleixner [off-list ref] wrote:

On Fri, 5 Sep 2014, Andrew Bresticker wrote:

quoted

 static void gic_mask_irq(struct irq_data *d)
 {
-     GIC_CLR_INTR_MASK(d->irq - gic_irq_base);
+     unsigned int irq = d->irq - gic_irq_base;
+
+     if (gic_is_local_irq(irq)) {
+             GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_RMASK),
+                      1 << GIC_INTR_BIT(gic_hw_to_local_irq(irq)));
+     } else {
+             GIC_CLR_INTR_MASK(irq);
+     }
 }

 static void gic_unmask_irq(struct irq_data *d)
 {
-     GIC_SET_INTR_MASK(d->irq - gic_irq_base);
+     unsigned int irq = d->irq - gic_irq_base;
+
+     if (gic_is_local_irq(irq)) {
+             GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_SMASK),
+                      1 << GIC_INTR_BIT(gic_hw_to_local_irq(irq)));
+     } else {
+             GIC_SET_INTR_MASK(irq);
+     }

Why are you adding a conditional in all these functions instead of
having two interrupt chips with separate callbacks and irqdata?

Ok, I'll use a separate irqchip.

And looking at GIC_SET_INTR_MASK(irq) makes me shudder even more. The
whole thing can be replaced with the generic interrupt chip functions.

If you set it up proper, then there is not a single conditional or
runtime calculation of bitmasks, address offsets etc.

Yes, I'd like to use the generic irqchip library here, but Malta and
SEAD-3 will need to be converted over to using irq domains.  Perhaps
I'll do that first - it should get rid of a lot of the other ugliness
here as well.